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NAME

       Cver - Verilog Simulator

SYNOPSIS

       cver [options][verilogfiles...]

DESCRIPTION

       Cver  is  a  full  1995 IEEE P1364 standard Verilog simulator.  This is
       "GPL Cver", the GPL version.

SEE ALSO

       The full documentation for Cver ,  please  visit  http://www.pragmatic-
       c.com/gpl-cver

AUTHOR

       Pragmatic C Software Corp.

       This manual page was written by NIIBE Yutaka <gniibe@fsij.org>, for the
       Debian project (but may be used by others).